Product Summary

The M12L64322A-6T is a 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the M12L64322A-6T to be useful for a variety of high bandwidth, high performance memory system applications.

Parametrics

M12L64322A-6T absolute maximum ratings: (1)Voltage on any pin relative to VSS, VIN, VOUT: -1.0 to 4.6 V; (2)Voltage on VDD supply relative to VSS, VDD, VDDQ: -1.0 to 4.6 V; (3)Storage temperature, TSTG: -55 to +150℃; (4)Power dissipation, PD: 1 W; (5)Short circuit current, IOS: 50 mA.

Features

M12L64322A-6T features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Four banks operation; (4)MRS cycle with address key programs: CAS Latency; Burst Length; Burst Type (Sequential & Interleave) ; (5)All inputs are sampled at the positive going edge of the system clock; (6)DQM for masking; (7)Auto & self refresh; (8)15.6μs refresh interval.

Diagrams

M12L64322A-6T block diagram

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M12L64322A-6TG
M12L64322A-6TG

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M12L64322A-6TIG
M12L64322A-6TIG

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Data Sheet

Negotiable